1. Field of the Invention
The present invention relates to a semiconductor device and a method for manufacturing the same. In particular, it relates to a semiconductor device and a method for manufacturing the same intended for improving the performance of MIS transistors.
2. Description of Related Art
In recent years, there has been huge demand for increasing the operating speed of MIS transistors for the purpose of improving processing capacity of semiconductor devices, such as LSIs. A preferable way to increase the operating speed of the MIS transistors is to improve current characteristics of the MIS transistors. The MIS transistors have been miniaturized for the improvement in current characteristics. However, this is accompanied by increase in parasitic resistance and concentration in a substrate, thereby reducing carrier mobility. It could be said that the miniaturization of the MIS transistors cannot improve the current characteristics of the MIS transistors any more.
As an alternative to the miniaturization of the MIS transistors, there is a known technique as explained below (e.g., see Japanese Unexamined Patent Publication No. 2004-87640 and IEEE Journal of Solid-State Circuits, Vol. 35, No. 1, January 2000). For n-type MIS transistors, there is a known technique of depositing a stress control film such as a nitride film having internal tensile stress on the n-type MIS transistors. This makes it possible to apply tensile stress to channels of the n-type MIS transistors, thereby improving the carrier mobility in the n-type MIS transistors.
According to a known technique for p-type MIS transistors, the MIS transistors are arranged on a substrate such that the channel length direction of the MIS transistors is substantially parallel to the <100> crystallographic axis direction of the substrate, not to the <110> crystallographic axis direction. This improves the carrier mobility in the p-type MIS transistors.
Further, there has been considered a method for realizing a semiconductor device by bringing the channel length direction of the MIS transistors substantially parallel to the <100> crystallographic axis direction of the substrate and depositing a tensile stress control film on the MIS transistors. According to the method, both of the n- and p-type MIS transistors are improved in current characteristics.